A review on SRAM-based computing in-memory: Circuits, functions, and applications

• Published in: Journal of semiconductors Vol. 43; no. 3; pp. 31401 - 43
• Main Authors: Lin, Zhiting, Tong, Zhongzhen, Zhang, Jin, Wang, Fangming, Xu, Tian, Zhao, Yue, Wu, Xiulong, Peng, Chunyu, Lu, Wenjuan, Zhao, Qiang, Chen, Junning
• Format: Journal Article
• Language: English
• Published: Chinese Institute of Electronics 01.03.2022; School of Integrated Circuits,Anhui University,Hefei 230601,China
• Subjects: artificial intelligence (AI); computing in-memory (CIM); convolutional neural network (CNN); static random-access memory (SRAM); von Neumann bottleneck; convolutional neural network(CNN); computing in-memory(CIM); von Neumann bottleneck; artificial intelligence(AI); static random-access memory(SRAM)
• ISSN: 1674-4926; 2058-6140
• DOI: 10.1088/1674-4926/43/3/031401

Abstract Artificial intelligence (AI) processes data-centric applications with minimal effort. However, it poses new challenges to system design in terms of computational speed and energy efficiency. The traditional von Neumann architecture cannot meet the requirements of heavily data-centric applications due to the separation of computation and storage. The emergence of computing in-memory (CIM) is significant in circumventing the von Neumann bottleneck. A commercialized memory architecture, static random-access memory (SRAM), is fast and robust, consumes less power, and is compatible with state-of-the-art technology. This study investigates the research progress of SRAM-based CIM technology in three levels: circuit, function, and application. It also outlines the problems, challenges, and prospects of SRAM-based CIM macros.