Low Voltage and High Speed 1Xnm 1T1C FE-RAM with Ultra-Thin 5nm HZO
World-first 1Xnm half-pitch FE-RAM with 8Gb density was fabricated, and operation was confirmed. The conventional FE-RAM maximizes 2Pr by adjusting the capacitor plate voltage according to the data. In this study, despite using a fixed capacitor plate voltage, we showed that memory operation is poss...
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Published in | 2021 IEEE International Electron Devices Meeting (IEDM) pp. 33.3.1 - 33.3.4 |
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Main Authors | , , , , , , , , , , , , , , , , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
11.12.2021
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Subjects | |
Online Access | Get full text |
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Summary: | World-first 1Xnm half-pitch FE-RAM with 8Gb density was fabricated, and operation was confirmed. The conventional FE-RAM maximizes 2Pr by adjusting the capacitor plate voltage according to the data. In this study, despite using a fixed capacitor plate voltage, we showed that memory operation is possible even at a low voltage of ±0.6V by using the pinched hysteresis of 5nm-thick ultra-thin HZO. We measured the switching speed by changing the write time from 5ns to 80ns. 70% of the total polarization can be switched within 20ns tWR (like the DRAM), and the remaining 30% responds to a wide range of write time between 20 and 80ns. For improving the switching speed, it is necessary to reduce bulk defects or design schemes such as Vcore overdrive. |
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ISSN: | 2156-017X |
DOI: | 10.1109/IEDM19574.2021.9720545 |