The future of two-dimensional semiconductors beyond Moore’s law

• Published in: Nature nanotechnology Vol. 19; no. 7; pp. 895 - 906
• Main Authors: Kim, Ki Seok, Kwon, Junyoung, Ryu, Huije, Kim, Changhyun, Kim, Hyunseok, Lee, Eun-Kyu, Lee, Doyoon, Seo, Seunghwan, Han, Ne Myo, Suh, Jun Min, Kim, Jekyung, Song, Min-Kyu, Lee, Sangho, Seol, Minsu, Kim, Jeehwan
• Format: Journal Article
• Language: English
• Published: London Nature Publishing Group UK 01.07.2024; Nature Publishing Group
• Subjects: 639/301/1005/1007; 639/925/927/1007; Chemistry and Materials Science; Dielectrics; Electric contacts; Electronics; Electronics industry; Integration; Low dimensional semiconductors; Materials Science; Nanotechnology; Nanotechnology and Microengineering; Review Article; Scaling; Semiconductors; Silicon; Thickness; Transistors; Trends; Two dimensional materials
• ISSN: 1748-3387; 1748-3395; 1748-3395
• DOI: 10.1038/s41565-024-01695-1

The primary challenge facing silicon-based electronics, crucial for modern technological progress, is difficulty in dimensional scaling. This stems from a severe deterioration of transistor performance due to carrier scattering when silicon thickness is reduced below a few nanometres. Atomically thin two-dimensional (2D) semiconductors still maintain their electrical characteristics even at sub-nanometre scales and offer the potential for monolithic three-dimensional (3D) integration. Here we explore a strategic shift aimed at addressing the scaling bottleneck of silicon by adopting 2D semiconductors as new channel materials. Examining both academic and industrial viewpoints, we delve into the latest trends in channel materials, the integration of metal contacts and gate dielectrics, and offer insights into the emerging landscape of industrializing 2D semiconductor-based transistors for monolithic 3D integration. This Review explores adopting 2D semiconductors to overcome the scaling bottleneck of Si-based electronics. Recent trends and potential approaches for the development of 2D materials as a channel are discussed. Following this, the prerequisites, obstacles and feasible technologies for integrating contacts and gate dielectrics with 2D semiconductor-based channels are examined. The Review also provides an industrial perspective towards facilitating monolithic 3D integration.