Substrate bias effect on blocking capability of a lateral p-channel MOSFET on SOI

The substrate bias effect on the breakdown voltage of a p-channel MOSFET on a SOI film (SOI-PMOS) is investigated numerically and experimentally. The breakdown voltage of the SOI-PMOS is estimated with varying substrate bias, and the breakdown mechanism is analyzed. In view of the application of the...

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Bibliographic Details
Published inSolid-state electronics Vol. 41; no. 11; pp. 1773 - 1779
Main Authors Sumida, Hitoshi, Hirabayashi, Atsuo
Format Journal Article
LanguageEnglish
Published Elsevier Ltd 01.11.1997
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Summary:The substrate bias effect on the breakdown voltage of a p-channel MOSFET on a SOI film (SOI-PMOS) is investigated numerically and experimentally. The breakdown voltage of the SOI-PMOS is estimated with varying substrate bias, and the breakdown mechanism is analyzed. In view of the application of the SOI-PMOS as a high-side switch, the device structure is optimized for achieving a high breakdown voltage at negative substrate bias.
ISSN:0038-1101
1879-2405
DOI:10.1016/S0038-1101(97)00160-3