A comparative hardware implementation of histogram of oriented gradients as a descriptor in embedded tracking of swarm robots

• Published in: Journal of parallel and distributed computing Vol. 198; p. 105026
• Main Authors: Legarda, Diego, Pérez, Karen, Muñoz, Daniel M.
• Format: Journal Article
• Language: English
• Published: Elsevier Inc 01.04.2025
• Subjects: Hardware architecture; HOG; Robot tracking; SoC FPGA; SoC FPGA; HOG; Robot tracking; Hardware architecture
• ISSN: 0743-7315
• DOI: 10.1016/j.jpdc.2024.105026

The Histogram of Oriented Gradients (HOG) algorithm is widely utilized in image processing for tasks such as detection, classification, and tracking. However, several challenges arise when implementing this algorithm on computing platforms with limited memory and low power consumption, such as mobile robots and drones. This work presents an in-depth analysis and implementation of three innovative hardware architectures for HOG, specifically designed for real-time processing using Field Programmable Gate Arrays (FPGAs) in the context of mobile robot localization. The primary focus of these architectures is to simplify the processing operations involved in gradient magnitude and orientation calculation, histogram generation, and normalization. These simplifications lead to a reduction in resource utilization and energy consumption. Experimental results conducted on a Zynq 7020 device demonstrated minimal relative error values throughout the entire process, along with a significant execution time improvement of over 1000 times when compared to the software-based solution. •Implementation and validation of three hardware architectures of simplified HOG algorithms.•Simplified HOG avoids using the Cordic algorithm and histogram normalization for gradient calculations.•Validation of the descriptor on a large database and in a collaborative robotics application case.