Parallel Processor Architecture with a New Algorithm for Simultaneous Processing of MIPS-Based Series Instructions

Processors are main part of the calculation and decision making of a system. Today, due to the increasing need of industry and technology to faster and more accurate computing power, design and manufacture of parallel processing units, has been very much considered. One of the most important process...

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Bibliographic Details
Published inEmerging science journal Vol. 1; no. 4; pp. 226 - 232
Main Authors Hadizadeh, Ali, Tanghatari, Ehsan
Format Journal Article
LanguageEnglish
Published Ital Publication 01.12.2017
Subjects
Intelligent Branch Prediction
Intelligent Instruction Prompts
MIPS Processor
Parallel Alignment
Parallel Processor
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ISSN2610-9182
2610-9182
DOI10.28991/ijse-01126

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Summary:Processors are main part of the calculation and decision making of a system. Today, due to the increasing need of industry and technology to faster and more accurate computing power, design and manufacture of parallel processing units, has been very much considered. One of the most important processor families used in various devises is the MIPS processors. This processor family had been considered in the telecom and control industry as a reasonable choice. In this paper, new architecture based on this processor, with new parallel processing design, is provided to allow parallel execution of instructions dynamically. Ultimately, the processor efficiency to several fold will be increased. In this architecture, new ideas for the issuance of instructions in parallel, intelligent detection of conditional jumps and memory management are presented.
ISSN:2610-9182
2610-9182
DOI:10.28991/ijse-01126