APA (7th ed.) Citation

Parameshwara, M. C., & Maroof, N. (2022). An Area-Efficient Majority Logic-Based Approximate Adders with Low Delay for Error-Resilient Applications. Circuits, systems, and signal processing, 41(9), 4977-4997. https://doi.org/10.1007/s00034-022-02014-6

Chicago Style (17th ed.) Citation

Parameshwara, M. C., and Naeem Maroof. "An Area-Efficient Majority Logic-Based Approximate Adders with Low Delay for Error-Resilient Applications." Circuits, Systems, and Signal Processing 41, no. 9 (2022): 4977-4997. https://doi.org/10.1007/s00034-022-02014-6.

MLA (9th ed.) Citation

Parameshwara, M. C., and Naeem Maroof. "An Area-Efficient Majority Logic-Based Approximate Adders with Low Delay for Error-Resilient Applications." Circuits, Systems, and Signal Processing, vol. 41, no. 9, 2022, pp. 4977-4997, https://doi.org/10.1007/s00034-022-02014-6.