A Temperature Compensated Ring Oscillator With LC-Based Period Error Detection
This brief presents a hybrid oscillator architecture that combines an <inline-formula> <tex-math notation="LaTeX">LC </tex-math></inline-formula> resonator and an inverter-based ring oscillator to exploit the inherent benefit of an <inline-formula> <tex-mat...
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Published in | IEEE transactions on very large scale integration (VLSI) systems Vol. 31; no. 12; pp. 2152 - 2156 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.12.2023
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | This brief presents a hybrid oscillator architecture that combines an <inline-formula> <tex-math notation="LaTeX">LC </tex-math></inline-formula> resonator and an inverter-based ring oscillator to exploit the inherent benefit of an <inline-formula> <tex-math notation="LaTeX">LC </tex-math></inline-formula> resonator for frequency accuracy with low power consumption. This architecture uses the period of the <inline-formula> <tex-math notation="LaTeX">LC </tex-math></inline-formula> resonator as a reference time to control the period of the ring oscillator through a feedback loop. By intermittently turning on the <inline-formula> <tex-math notation="LaTeX">LC </tex-math></inline-formula> resonator for the period error detection, its power consumption could be reduced to a reasonable level while benefitting from its frequency accuracy over environmental variations. The implemented oscillator in a 40-nm CMOS process achieves a temperature sensitivity of 7.65 ppm/°C in a temperature range of −20 °C-80 °C after two-point batch calibration with a second-order polynomial. A period jitter shows 2.44 psrms with an output frequency of 98 MHz. |
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ISSN: | 1063-8210 1557-9999 |
DOI: | 10.1109/TVLSI.2023.3322709 |