Dual-Path Hybrid Residual Network for Profiled Side-Channel Analysis
Side-channel analysis poses a significant security threat to cryptographic chips in embedded devices. The use of deep learning in side-channel analysis makes it easier to compromise the security of cryptographic chips. Although these chips equipped with countermeasures can increase the complexity of...
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Published in | IEEE transactions on circuits and systems. II, Express briefs Vol. 71; no. 8; pp. 3985 - 3989 |
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Main Authors | , , , , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.08.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | Side-channel analysis poses a significant security threat to cryptographic chips in embedded devices. The use of deep learning in side-channel analysis makes it easier to compromise the security of cryptographic chips. Although these chips equipped with countermeasures can increase the complexity of side-channel analysis, it is essential to continue exploring and developing more advanced analysis methods for better security. In this brief, we propose a simple residual network called ResNet-S, which has shown strong performance. Based on this foundation, we have developed the dual-path hybrid residual network. The dual-path hybrid convolution technique is used for feature fusion. It utilizes a multi-scale convolution strategy to effectively reduces the required number of traces for key recovery. We have evaluated the performance of our proposed neural networks on different datasets, and the experimental results show that our proposed networks outperform the state-of-the-art neural networks that have been published. |
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ISSN: | 1549-7747 1558-3791 |
DOI: | 10.1109/TCSII.2024.3371110 |