An Intrinsically Linear 13-Level Capacitive DAC for Delta Sigma Modulators
Mismatch of the digital-to-analog converter (DAC) elements is the major limitation for Signal to Noise and Distortion Ratio (SNDR) and Spurious Free Dynamic Range (SFDR) in multi-bit Delta Sigma Modulators (DSM). In this brief we extend a previously introduced technique to build an intrinsically lin...
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Published in | IEEE transactions on circuits and systems. II, Express briefs Vol. 70; no. 4; pp. 1291 - 1295 |
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Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.04.2023
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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