A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C

This article presents a high-precision sense amplifier technique, a fast write scheme, and a one-time-programmable (OTP) memory cell read technique applied to a 22-nm 32-Mb embedded STT-MRAM (eMRAM) macro for high-end microcontroller units (MCUs). A boosted cross-coupled sense amplifier (BCC-SA) ach...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 59; no. 4; pp. 1283 - 1292
Main Authors Shimoi, Takahiro, Matsubara, Ken, Saito, Tomoya, Ogawa, Tomoya, Taito, Yasuhiko, Kaneda, Yoshinobu, Izuna, Masayuki, Takeda, Koichi, Mitani, Hidenori, Ito, Takashi, Kono, Takashi
Format Journal Article
LanguageEnglish
Published New York IEEE 01.04.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:This article presents a high-precision sense amplifier technique, a fast write scheme, and a one-time-programmable (OTP) memory cell read technique applied to a 22-nm 32-Mb embedded STT-MRAM (eMRAM) macro for high-end microcontroller units (MCUs). A boosted cross-coupled sense amplifier (BCC-SA) achieves 5.1- and 5.9-ns random read access at 125 °C and 150 °C, respectively. A variable parallel bit write (VPBW) with a fast voltage setup (VPBW-FVS) scheme and write voltage always on (WVAO) mode enable 7.4-MB/s write throughput and 73% write energy reduction. A stabilization of operating conditions with variable current (SOC-VC) technique allows a sense amplifier to be shared with both embedded magnetoresistive random access memory (MRAM)-based OTP and MRAM cell read modes.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2023.3314822