eBPFlow: A Hardware/Software Platform to Seamlessly Offload Network Functions Leveraging eBPF

• Published in: IEEE/ACM transactions on networking Vol. 32; no. 2; pp. 1319 - 1332
• Main Authors: Pacifico, Racyus D. G., Duarte, Lucas F. S., Vieira, Luiz F. M., Raghavan, Barath, Nacif, Jose A. M., Vieira, Marcos A. M.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.04.2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Codes; eBPF; Engines; Field programmable gate arrays; Flexibility; Hardware; NetFPGA; Networking functions virtualization; Parallel processing; programmable data plane; Software; Software-defined networking; Throughput
• ISSN: 1063-6692; 1558-2566
• DOI: 10.1109/TNET.2023.3318251

NFV and SDN enable flexibility and programmability at the data plane. In addition, offloading packet processing to a hardware saves processing resources to compute other workloads. However, fulfilling requirements such as high throughput and low latency with a flexible and programmable data plane is challenging. This paper introduces eBPFlow, a platform for seamlessly accelerating network computation. It builds upon eBPF. eBPFlow combines flexibility and programmability in software with high performance using an FPGA. We implemented our system on the NetFPGA SUME, performing tests on a physical testbed. We built a range of NFs. Our results show that the eBPFlow supports offloading of NFs with throughput at the line rate, latency between <inline-formula> <tex-math notation="LaTeX">20~\mu \text{s} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">40~\mu \text{s} </tex-math></inline-formula>, communication with host, and consumption of 22 W. Moreover, eBPFlow processes 12.05 Mpps more than the kernel. eBPFlow has a throughput of 2.59 Gbps higher than the hXDP, a system similar to eBPFlow.