Total Ionizing Dose Effects on the Performance and Hot Carrier Degradation of LDMOS Transistors

• Published in: IEEE transactions on electron devices Vol. 72; no. 2; pp. 543 - 549
• Main Authors: Mahajan, Bikram Kishore, Chen, Yen-Pu, Asaduz Zaman Mamun, M., Ashraful Alam, Muhammad
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.02.2025; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Correlation; Current measurement; Degradation; Field effect transistors; Gamma radiation; Gamma rays; hot carrier degradation (HCD); Hot carriers; lateral double diffused MOS (LDMOS); MOS devices; Physics; Power amplifiers; power electronics; Radiation; Satellite communications; Satellites; Silicon; Stress; System reliability; Threshold voltage; Total ionizing dose; total ionizing dose (TID); Transient analysis; Transistors; Trapped charge; universal scaling of degradation
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2024.3512480

Lateral double diffused MOS (LDMOS) transistors have found numerous applications as radio-frequency and power amplifiers in a variety of systems, including satellite communications and high-energy physics experiments. While the LDMOS transistors used in these systems have inherent reliability issues, such as hot carrier degradation (HCD), they are simultaneously subjected to high radiation. Therefore, it is essential to understand how the interface traps created during radiation interact with those created during the HCD stress of these transistors. In this article, we: 1) subject the LDMOS transistors to various total ionizing doses (TIDs) of gamma radiation and HCD stress; 2) use the super single-pulse charge pumping (CP) technique to quantify the generation of interface traps (<inline-formula> <tex-math notation="LaTeX">\Delta {N}_{\text {IT}} </tex-math></inline-formula>) and trapped charges (<inline-formula> <tex-math notation="LaTeX">\Delta {N}_{\text {OT}} </tex-math></inline-formula>); 3) study the combined effect of HCD and TID in terms of threshold voltage shift (<inline-formula> <tex-math notation="LaTeX">\Delta {V}_{\text {TH}} </tex-math></inline-formula>) and linear drain current degradation (<inline-formula> <tex-math notation="LaTeX">\Delta {I}_{{D},\text {lin}} </tex-math></inline-formula>); 4) describe the correlation between HCD and TID using well-known physics-based models; and 5) compare our findings with that of an LDMOS of varied geometry, dimension, and bias, illustrating that the model and inferences drawn from the conclusions of this article can be applied to other LDMOS devices as well. This article establishes that the physics of HCD is universal and takes us a step closer to a generalized HCD model for power FETs.