A Novel Approach to Increase the Power Utilization of Nano-Pillar Based CdS/CdTe Solar Cell by Integration of CdS Trench: A Way Forward
An innovative strategy has been employed to boost the efficiency of Nanopillar-based n-CdS/p-CdTe solar cells by integrating a CdS trench (CdST) within the CdTe layer. Through device analysis using TCAD software Silvaco, the CdST demonstrates much desired squared current-voltage characteristics. Mor...
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Published in | IEEE electron device letters Vol. 45; no. 7; pp. 1381 - 1384 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.07.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | An innovative strategy has been employed to boost the efficiency of Nanopillar-based n-CdS/p-CdTe solar cells by integrating a CdS trench (CdST) within the CdTe layer. Through device analysis using TCAD software Silvaco, the CdST demonstrates much desired squared current-voltage characteristics. Moreover, the performance metrics of the device have been fine-tuned by optimizing the geometrical parameters of the CdS trench, including its width, depth, and placement. Compared to the conventional Nanopillar Based n-CdS/p-CdTe structure without a CdS trench (CNP), the optimized geometry incorporating a CdS trench has demonstrated an improvement of 5% in efficiency (EFF) and 13% in fill factor (FF). |
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ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2024.3404028 |