Analytical Evaluation of Thermally Oxidized and Deposited Dielectric in NMOS-PMOS devices
We demonstrate the influence of enhancing the dielectric film used to form the gate in complimentary MOS circuits, designed for high temperature operation. The data show that the characteristics of both n-MOS and p-MOS capacitors and transistors have degraded capacitance characteristics in terms of...
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Published in | Materials Science Forum Vol. 858; pp. 631 - 634 |
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Main Authors | , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
Pfaffikon
Trans Tech Publications Ltd
24.05.2016
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Subjects | |
Online Access | Get full text |
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Summary: | We demonstrate the influence of enhancing the dielectric film used to form the gate in complimentary MOS circuits, designed for high temperature operation. The data show that the characteristics of both n-MOS and p-MOS capacitors and transistors have degraded capacitance characteristics in terms of the trapped charge in the dielectric, although the interface state density is dictated by the underlying stub oxide, at around 5×1012 cm-2eV-1. The use of a deposited oxide also reduces the variability in the critical electric field in the oxide, whilst maintaining a value of approximately 10MV cm-1. The channel mobility extracted from n-and pMOS transistors fabricated alongside the capacitors showed similar values, of approximately 3.8 cm2V-1s-1, which are limited by the high doping level in the epilayers used in this study. |
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Bibliography: | Selected, peer reviewed papers from the 16th International Conference on Silicon Carbide and Related Materials, October 4-9, 2015, Giardini Naxos, Italy ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
ISBN: | 3035710422 9783035710427 |
ISSN: | 0255-5476 1662-9752 1662-9752 |
DOI: | 10.4028/www.scientific.net/MSF.858.631 |