Total ionizing dose radiation hardening technology based on double-charge multiple-step ion implantation

• Published in: Microelectronics and reliability Vol. 142; p. 114903
• Main Authors: Jianwei, Wu, Zongguang, Yu, Genshen, Hong, Zhiqiang, Xiao, Jing, Luo
• Format: Journal Article
• Language: English
• Published: Elsevier Ltd 01.03.2023
• Subjects: Double-charge ion implantation; Leakage current; Radiation hardening; Threshold voltage drift; TID radiation; DSP; Double-charge ion implantation; Radiation hardening; SIMOX; TID radiation; Threshold voltage drift; SEM; Leakage current; WAT; SOI; SRAM; TID
• ISSN: 0026-2714; 1872-941X
• DOI: 10.1016/j.microrel.2023.114903

This paper describes the total ionizing dose (TID) radiation hardening of buried oxide in separation by implantation of oxygen silicon on insulator (SOI) substrates. In this study, 0.5-μm partially depleted SOI complementary metal–oxide–semiconductor (CMOS) transistors and circuits were prepared using double-charge multiple-step ion implantation and annealing, and the changes in the drive current, leakage current, and threshold voltage of the CMOS transistor under different TID radiation conditions were compared. Under a TID of 500 k Rad(Si), radiation-hardened H-type N-channel metal–oxide–semiconductor transistors had a threshold voltage drift of <100 mV in the worst case, and H-type P-channel metal–oxide–semiconductor transistors had a threshold voltage drift of <150 mV. Under a TID of 1 Mrad(Si), CMOS transistors showed no significant increase in leakage current caused by TID radiation. Under a TID of 500 k Rad(Si), the standby current of the radiation-hardened 32-bit DSP was <1.5 mA. The high-density integrated circuits prepared using this technology performed well under harsh ionizing radiation environments. Finally, this technology was compared with similar foreign technologies and TID-unhardened wafers with hardened wafers. This technology reached the international advanced level among equivalent technologies regarding hole capture cross section and maximum threshold voltage drift in the model. 85.30.De 85.30.-e. •Increasing range to reach back interface by double charge ion implantation•A large number of electron traps are formed by multiple steps of annealing.•Adding neutral traps to the physical mechanism of ionizing total dose radiation•The radiation resistance of hardened and unhardened SOI MOSFETs is compared.•The radiation parameters of hardened and unhardened SOI wafers are compared.