Experimental Characterization and Signal Integrity Verification of Interconnect Lines with Inter-layer Vias

Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-parameter measurements. Test patterns are designed and fabricated using a package process. Then they are measured using Vector Network Analyzer (VNA)up to 25 GHz. Modeling a via as a circuit, its mode...

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Bibliographic Details
Published inJournal of semiconductor technology and science Vol. 11; no. 1; pp. 15 - 22
Main Authors Kim, Hye-Won, Kim, Dong-Chul, Eo, Yung-Seon
Format Journal Article
LanguageEnglish
Published 대한전자공학회 01.03.2011
Subjects
전기공학
scattering parametervia
eye-diagram
Circuit model
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Summary:Interconnect lines with inter-layer vias are experimentally characterized by using high-frequency S-parameter measurements. Test patterns are designed and fabricated using a package process. Then they are measured using Vector Network Analyzer (VNA)up to 25 GHz. Modeling a via as a circuit, its model parameters are determined. It is shown that the circuit model has excellent agreement with the measured S-parameters. The signal integrity of the lines with inter-layer vias is evaluated by using the developed circuit model. Thereby, it is shown that via may have a substantially deteriorative effect on the signal integrity of high-speed integrated circuits. KCI Citation Count: 3
Bibliography:G704-002163.2011.11.1.002
ISSN:1598-1657
2233-4866
DOI:10.5573/JSTS.2011.11.1.015