Differential BiCMOS logic circuits: fault characterization and design-for-testability

Merged Current Switch Logic (MCSL) and Differential Cascode Voltage Switch Logic (DCVSL) are two common structures for differential BiCMOS logic family, that have several potential applications in high-speed VLSI circuits. This paper studies the fault characterization of these BiCMOS circuits. The i...

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Published inIEEE transactions on very large scale integration (VLSI) systems Vol. 3; no. 3; pp. 437 - 445
Main Authors Hessabi, S., Osman, M.Y., Elmasry, M.I.
Format Journal Article
LanguageEnglish
Published IEEE 01.09.1995
Subjects
Analytical models
BiCMOS integrated circuits
Circuit analysis
Circuit faults
Circuit testing
Logic circuits
Switches
Switching circuits
Very large scale integration
Voltage
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Summary:Merged Current Switch Logic (MCSL) and Differential Cascode Voltage Switch Logic (DCVSL) are two common structures for differential BiCMOS logic family, that have several potential applications in high-speed VLSI circuits. This paper studies the fault characterization of these BiCMOS circuits. The impact of each possible single defect on the behavior of the circuits is analyzed by simulation. A new class of faults which is unique to differential circuits is identified and its testability is assessed. We propose a design-for-testability method that facilitates testing of this class of faults. Two different realizations for this method are introduced. The impact of this circuit modification on the behavior of the circuit in normal mode is investigated.< >
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ISSN:1063-8210
1557-9999
DOI:10.1109/92.407001