A Novel Self-aligned Processing for Doubling the Integration Density of 3D NAND Flash Memory

• Published in: Journal of semiconductor technology and science Vol. 25; no. 3; pp. 199 - 205
• Main Authors: Oh, Yun-Jae, Suh, Yunejae, Son, So-Won, Cho, Seongjae, Kang, Daewoong, Cho, Il-Hwan
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 01.06.2025
• Subjects: 전기공학
• ISSN: 1598-1657; 2233-4866
• DOI: 10.5573/JSTS.2025.25.3.199

In this paper, we propose a novel processing idea to double the number of cells in 3D NAND flash memory to overcome the stacking cell limit of conventional 3D NAND flash memory. We present a process integration flow primarily focused on selective etching, where the core innovation lies in using materials with high selectivity to create self-aligned split cells with precisely identical characteristics. Using technology computer-aided design (TCAD) process simulation, we define the device based on the proposed process integration flow and extract the characteristics of the split cells. We confirm the equivalence of the split cells and evaluate their reliability by discussing incremental step pulse programming (ISPP), incremental step pulse erasing (ISPE), cell current (Icell), and retention characteristics. In this study, we propose a method in 3D NAND flash memory process integration where a single circular cell can be exactly divided into semicircular cells with identical characteristics. KCI Citation Count: 0