A Multi-Band CMOS Frequency Divider Integrated Circuit

• Published in: Journal of semiconductor technology and science Vol. 25; no. 2; pp. 176 - 183
• Main Authors: Kim, Young-Gi, Bae, Sung-Hoon, Kang, Bo-Seong, Jang, Hyeong-Jun, Hwang, Jae-Yeon, Roblin, Patrick
• Format: Journal Article
• Language: English
• Published: 대한전자공학회 01.04.2025
• Subjects: 전기공학
• ISSN: 2233-4866; 1598-1657; 1598-1657; 2233-4866
• DOI: 10.5573/JSTS.2025.25.2.176

This paper presents a 65 nm CMOS divider circuit that (1) operates as a divider with a division ratio of 64 based on digital logic when the DC supply voltage is low and (2) operates as a multi-band injection-locked frequency divider (ILFD) with a unique division ratio for each band of operation when the supply voltage is high. The proposed divider consists of a six-stage cascade of current-mode logic (CML) dividers with buffer circuits. The frequency span of operation in the ILFD mode is divided into 7 sub-bands from 2 to 27 GHz depending on the supply voltage. The proposed circuit demonstrates a record 528 ILFD division ratio with a low power consumption of 0.926 mW, which is the best performance reported so far in the literature. A phase noise of-102.27 dBc is measured at 100 kHz offset for a 27.113 GHz input signal KCI Citation Count: 0