Area-optimized and Reliable Computing-in-memory Platform Based on STT-MRAM
In the era of rapidly increasing data volume, complementary metal-oxide-semiconductor-based von Neumann structures have encountered several limitations, such as increased leakage current and data movement overhead. To solve this problem, computing-in-memory (CIM) that performs simple operations in m...
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Published in | Journal of semiconductor technology and science Vol. 25; no. 1; pp. 56 - 65 |
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Main Authors | , |
Format | Journal Article |
Language | English |
Published |
대한전자공학회
01.02.2025
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Subjects | |
Online Access | Get full text |
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Summary: | In the era of rapidly increasing data volume, complementary metal-oxide-semiconductor-based von Neumann structures have encountered several limitations, such as increased leakage current and data movement overhead. To solve this problem, computing-in-memory (CIM) that performs simple operations in memory has emerged.
In this paper, we propose an area optimized CIM platform based on spin-transfer torque magnetic random access memory (STT-MRAM). Compared with previous CIM, the proposed CIM platform is area optimized by performing AND/OR logic functions using fewer reference word lines, and it uses an offset-canceling current-sampling sense amplifier to provide more reliable operation. Monte Carlo HSPICE simulation results based on industry-compatible 28-nm model parameters demonstrate the functionality and performance of the proposed CIM platform. KCI Citation Count: 0 |
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ISSN: | 2233-4866 1598-1657 1598-1657 2233-4866 |
DOI: | 10.5573/JSTS.2025.25.1.56 |