Smart CMOS focal plane arrays: a Si CMOS detector array and sigma-delta analog-to-digital converter imaging system

This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame rate imaging are compared. The application domain for a fully parallel readout system is identified, and the design...

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Bibliographic Details
Published inIEEE journal of selected topics in quantum electronics Vol. 5; no. 2; pp. 296 - 305
Main Authors Joo, Y., Park, J., Thomas, M., Chung, K.S., Brooke, M.A., Jokerst, N.M., Wills, D.S.
Format Journal Article
LanguageEnglish
Published IEEE 01.03.1999
Subjects
Analog to digital conversion
Analog-digital conversion
Arrays
CMOS
CMOS process
Converters
Delta-sigma modulation
Detectors
Focal plane
Image processing
Image sequences
Imaging
Linearity
Real time systems
Sensor arrays
Testing
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Summary:This paper evaluates the potential for the real-time utilization of high frame rate image sequences using a fully parallel readout system. Multiple readout architectures for high frame rate imaging are compared. The application domain for a fully parallel readout system is identified, and the design for a fully parallel, monolithically integrated smart CMOS focal plane array is presented. This focal plane image processing chip, with an 8/spl times/8 array of Si CMOS detectors each of which have a dedicated on-chip current input first-order sigma-delta analog-to-digital converter front end, has been fabricated, and test results for uniformity and linearity are presented.
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ISSN:1077-260X
1558-4542
DOI:10.1109/2944.778309