Analysis of Abnormal Upturns in Capacitance-Voltage Characteristics for MOS Devices With High- k Dielectrics

• Published in: IEEE electron device letters Vol. 32; no. 4; pp. 434 - 436
• Main Authors: Chang-Woo Sohn, Hyun Chul Sagong, Eui-Young Jeong, Do-Young Choi, Min Sang Park, Jeong-Soo Lee, Chang Yong Kang, Jammy, R, Yoon-Ha Jeong
• Format: Journal Article
• Language: English
• Published: IEEE 01.04.2011
• Subjects: Bypasses; Capacitance; Capacitance measurement; Current measurement; Devices; Dielectrics; dynamic response; Dynamics; equivalent circuits; Fittings; Frequency measurement; Gates; hafnium oxide; high- k dielectrics; Integrated circuit modeling; Leakage; Logic gates; MOS devices; radio-frequency measurement; Semiconductor device measurement; shallow trap level; upturns
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2011.2108257

In this letter, we analyze the nonsaturating upturns of capacitance under strong accumulation bias in MOS capacitors with high-k dielectrics. By comparing the electrical properties of dielectric samples with and without HfO 2 and by varying the ambient temperature, it is found that the conduction through the shallow trap levels in the HfO 2 bulk produces not only a steady-state current but also a dynamic current, which, in turn, causes the upturn in capacitance. The addition of RC shunts to the conventional small-signal model is proposed to consider the dynamic leakage effect. The model's effectiveness is verified by fitting the measured impedance spectrum and the measured capacitance. We suggest that measuring at a high frequency of hundreds of megahertz eliminates the dynamic interaction by shallow trap levels, allowing gate capacitance to be successfully reconstructed.