STREAM: Toward READ-Based In-Memory Computing for Streaming-Based Processing for Data-Intensive Applications

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 42; no. 11; pp. 3854 - 3867
• Main Authors: Rashed, Muhammad Rashedul Haq, Thijssen, Sven, Jha, Sumit Kumar, Yao, Fan, Ewetz, Rickard
• Format: Journal Article
• Language: English
• Published: New York The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01.11.2023
• Subjects: Boolean functions; Co-design; Computation; Data communication; Data processing; Data structures; Kernels; Logic synthesis; Mathematical analysis; Memory devices; Network latency; State of the art
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2023.3263723

With the rise of data-intensive applications, traditional computing paradigms have hit the memory-wall. In-memory computing using emerging nonvolatile memory (NVM) technology is a promising solution strategy to overcome the limitations of the von-Neumann architecture. In-memory computing using NVM devices has been explored in both analog and digital domains. Analog in-memory computing can perform matrix–vector multiplication (MVM) in an extremely energy-efficient manner. However, analog in-memory computing is prone to errors and resulting precision is therefore low. On the contrary, digital in-memory computing is a viable option for accelerating scientific computations that require deterministic precision. In recent years, several digital in-memory computing styles have been proposed. Unfortunately, state-of-the-art digital in-memory computing styles rely on repeated WRITE operations which involve switching of NVM devices. WRITE operations in NVM cells are expensive in terms of energy, latency, and device endurance. In this article, we propose a READ-based in-memory computing framework called STREAM. The framework performs streaming-based data processing for data-intensive applications. The STREAM framework consists of a synthesis tool that decomposes an arbitrary Boolean function into in-memory compute kernels. Two synthesis approaches are proposed to generate READ-based in-memory compute kernels using data structures from logic synthesis. A hardware/software co-design technique is developed to minimize the intercrossbar data communication. The STREAM framework is evaluated using circuits from the ISCAS85 benchmark suite, and Suite-Sparse applications to scientific computing. Compared with state-of-the-art in-memory computing framework, the proposed framework improves latency and energy performance with up to [Formula Omitted] and [Formula Omitted], respectively.