A 20.5-nW Resistor-Less Bandgap Voltage Reference With Self-Biased Compensation for Process Variations

This brief proposes a resistor-less bandgap reference (BGR) based on a leakage-based proportional-to-absolute-temperature (PTAT) scheme. The effect of process variations on the current is mitigated by employing self-biased current-limiting MOS transistors. The bias voltages needed for approximating...

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Bibliographic Details
Published inIEEE transactions on very large scale integration (VLSI) systems Vol. 30; no. 6; pp. 840 - 843
Main Authors Ji, Youngwoo, Sim, Jae-Yoon
Format Journal Article
LanguageEnglish
Published New York IEEE 01.06.2022
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:This brief proposes a resistor-less bandgap reference (BGR) based on a leakage-based proportional-to-absolute-temperature (PTAT) scheme. The effect of process variations on the current is mitigated by employing self-biased current-limiting MOS transistors. The bias voltages needed for approximating a large resistance can be obtained from a single branch by placing threshold-sampling transistors on top of the BGR output. The fabricated BGR in 0.18-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> CMOS occupies an active area of 0.035 mm 2 and consumes 20.5 nW, and it shows a standard deviation of 0.68% at untrimmed reference voltages.
ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2022.3158729