Toward an Optimal Countermeasure for Cache Side-Channel Attacks

In the last 15 years, we have witnessed a never-ending arm’s race between the attacker and the defender with respect to cache-based side-channel attacks. We have seen a slew of attacks, countermeasures (CMs), counterattacks, counter-CMs, and so on. We analyze the evolution of this area, propose thre...

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Bibliographic Details
Published inIEEE embedded systems letters Vol. 15; no. 3; pp. 141 - 144
Main Authors Shrivastava, Nivedita, Sarangi, Smruti R.
Format Journal Article
LanguageEnglish
Published Piscataway The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 01.09.2023
Subjects
Algorithms
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Summary:In the last 15 years, we have witnessed a never-ending arm’s race between the attacker and the defender with respect to cache-based side-channel attacks. We have seen a slew of attacks, countermeasures (CMs), counterattacks, counter-CMs, and so on. We analyze the evolution of this area, propose three necessary conditions for designing a successful CM, and then analyze timing and address-based CMs for popular algorithms, such as AES and PRESENT. We show that an optimal yet trivial solution for timing-based CMs is possible. Furthermore, address-based CMs are inferior to timing-based CMs, and they can be broken in [Formula Omitted] time.
ISSN:1943-0663
1943-0671
DOI:10.1109/LES.2022.3196499