SFF-8431 12.5Gbps channel return loss (RL) failure debug: Simulation and measurement validation

The process of troubleshooting a 12.5Gbps SFF-8431 channel return loss compliance failure is described in details. Excellent simulation to measurement correlation has been achieved after capturing a capacitive dip at the package/PCB interface ("phantom" capacitance) with package and board...

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Bibliographic Details
Published in2015 IEEE 65th Electronic Components and Technology Conference (ECTC) pp. 523 - 528
Main Authors Minhong Mi, Aude, Arlo, Jie Chen, Murugan, Rajen
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2015
Subjects
Capacitance
CPRI
Data models
Integrated circuit modeling
Loss measurement
Phantoms
return loss
SFF-8431
Solid modeling
TDR
Temperature measurement
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Summary:The process of troubleshooting a 12.5Gbps SFF-8431 channel return loss compliance failure is described in details. Excellent simulation to measurement correlation has been achieved after capturing a capacitive dip at the package/PCB interface ("phantom" capacitance) with package and board physical layout geometries merged into one single electromagnetic simulation. Source of the "phantom" capacitance is identified and explained. Design techniques to circumvent the "phantom" capacitance and their effectiveness are evaluated through simulation studies and measurements.
ISSN:0569-5503
2377-5726
DOI:10.1109/ECTC.2015.7159640