Efficient test generation algorithm for path delay faults
A new algorithm has been developed to perform efficient delay testing. The algorithm enables applications of a new implication of value using indirect implication. The results of ISCAS benchmark circuits show the effectiveness of the new algorithm.
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| Published in | Electronics letters Vol. 36; no. 1; pp. 13 - 14 |
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| Main Authors | , |
| Format | Journal Article |
| Language | English |
| Published |
06.01.2000
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| Online Access | Get full text |
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| Summary: | A new algorithm has been developed to perform efficient delay testing. The algorithm enables applications of a new implication of value using indirect implication. The results of ISCAS benchmark circuits show the effectiveness of the new algorithm. |
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| Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
| ISSN: | 0013-5194 |
| DOI: | 10.1049/el:20000043 |