AlGaN High Electron Mobility Transistor for High-Temperature Logic

• Published in: Journal of microelectronics and electronic packaging Vol. 20; no. 1; pp. 1 - 8
• Main Authors: Klein, B. A., Allerman, A. A., Baca, A. G., Nordquist, C. D., Armstrong, A. M., Van Heukelom, M., Rice, A., Patel, V., Rosprim, M., Caravello, L., DeBerry, R., Pipkin, J. R., Abate, V. M., Kaplar, R. J.
• Format: Journal Article
• Language: English
• Published: United States International Microelectronics And Packaging Society (IMAPS) 29.01.2023
• Subjects: AlGaN; ENGINEERING; HEMT; high-temperature electronics; III-N
• ISSN: 1551-4897; 1551-4897
• DOI: 10.4071/imaps.1832996

Here we report on AlGaN high electron mobility transistor (HEMT)-based logic development, using combined enhancement- and depletion-mode transistors to fabricate inverters with operation from room temperature up to 500°C. Our development approach included: (a) characterizing temperature-dependent carrier transport for different AlGaN HEMT heterostructures, (b) developing a suitable gate metal scheme for use in high temperatures, and (c) over-temperature testing of discrete devices and inverters. Hall mobility data (from 30°C to 500°C) revealed the reference GaN-channel HEMT experienced a 6.9x reduction in mobility, whereas the AlGaN channel HEMTs experienced about a 3.1x reduction. Furthermore, a greater aluminum contrast between the barrier and channel enabled higher carrier densities in the two-dimensional electron gas for all temperatures. The combination of reduced variation in mobility with temperature and high sheet carrier concentration showed that an Al-rich AlGaN-channel HEMT with a high barrier-to-channel aluminum contrast is the best option for an extreme temperature HEMT design. Three gate metal stacks were selected for low resistivity, high melting point, low thermal expansion coefficient, and high expected barrier height. The impact of thermal cycling was examined through electrical characterization of samples measured before and after rapid thermal anneal. The 200-nm tungsten gate metallization was the top performer with minimal reduction in drain current, a slightly positive threshold voltage shift, and about an order of magnitude advantage over the other gates in on-to-off current ratio. After incorporating the tungsten gate metal stack in device fabrication, characterization of transistors and inverters from room temperature up to 500°C was performed. The enhancement-mode (e-mode) devices’ resistance started increasing at about 200°C, resulting in drain current degradation. This phenomenon was not observed in depletion-mode (d-mode) devices but highlights a challenge for inverters in an e-mode driver and d-mode load configuration.