Thermal Comparison of Flip-Chip Relative to Chip-and-Wire Semiconductor Attachment in Hybrid Circuits: An Experimental Approach

• Published in: IEEE transactions on parts, hybrids, and packaging Vol. 12; no. 4; pp. 293 - 298
• Main Author: Cavanaugh, D.
• Format: Journal Article
• Language: English
• Published: IEEE 01.12.1976
• Subjects: Circuit synthesis; Coatings; Flip chip; Integrated circuit interconnections; Lead; Manufacturing; Power dissipation; Semiconductor device manufacture; Substrates; Thermal resistance
• ISSN: 0361-1000; 1558-2469
• DOI: 10.1109/TPHP.1976.1135146

An important consideration for the hybrid-circuit manufacturer is the power dissipation of active devices on the circuit. Heat generated in the junctions of the devices affects circuit reliability, performance, and current handling capability. Theory of the thermal characteristics of various chip interconnect methods is available, but results are too generalized to be of much use for circuit design. This paper presents a theoretical consideration, but is primarily an experimental comparison of the thermal characteristics ( \theta js , \theta ja , P max ) of solder-bump flip-chip and chip-and-wire attachment techniques under comparable conditions. The 2N2222A transistor electrical specification in flip-chip and in chip form (MMCF2222A and MMCS2222A, respectively) was chosen for the comparison. Substrates were prepared to offer a thermally fair representation of actual usage in the manufacture of hybrid circuits. The effect of conformally coating and directly heat-sinking chips through a substrate is also evaluated. Thermal resistance data from a previous experiment for flip chips, standard chips, and beam leads is offered for com- parison.