Design Considerations of Coupling Capacitors in GaAs Integrated Circuits
Capacitor coupling of GaAs depletion mode FETs is being pursued as a method of achieving low power integrated circuits which are tolerant of widely varying process parameters. The performance of these capacitors has been examined in three particular areas; the effect of backbias applied to an adjace...
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Published in | Japanese Journal of Applied Physics Vol. 22; no. S1; p. 393 |
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Main Authors | , |
Format | Journal Article |
Language | English |
Published |
01.01.1983
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Online Access | Get full text |
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Summary: | Capacitor coupling of GaAs depletion mode FETs is being pursued as a method of achieving low power integrated circuits which are tolerant of widely varying process parameters. The performance of these capacitors has been examined in three particular areas; the effect of backbias applied to an adjacent contact, the effect of geometry on the frequency dependence of the capacitance and alternative capacitor structures. The results have significance beyond capacitor coupling because they reveal the interaction of active device layers with other circuit elements, results which become increasingly important as high packing densities are approached on GaAs wafers. |
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ISSN: | 0021-4922 1347-4065 |
DOI: | 10.7567/JJAPS.22S1.393 |