A 3.5-GHz 0.24-nJ/b 100-Mb/s Fully Balanced FSK Receiver With Sideband Energy Detection

This letter presents a sub-6-GHz 100-Mb/s receiver that employs a fully balanced FSK, namely, a binary frequency-domain OOK (BFOOK) modulation. Demodulation is done based on a delay-line FM demodulator and a sideband energy detection (SB-ED) circuit with reduced noise bandwidth by leveraging a fully...

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Bibliographic Details
Published inIEEE solid-state circuits letters Vol. 4; pp. 26 - 29
Main Authors Ding, Cong, Wang, Bowen, Song, Haxin, Rhee, Woogeun, Wang, Zhihua
Format Journal Article
LanguageEnglish
Published Piscataway IEEE 2021
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Amplitude modulation
Band-pass filters
Bandwidth
Binary frequency-domain OOK (BFOOK)
Circuits
CMOS
Delays
Demodulation
Demodulators
Frequency shift keying
frequency-domain OOK (F-OOK)
FSK
high data rate
noncoherent demodulation
receiver
Receivers
sideband energy detection (SB-ED)
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Summary:This letter presents a sub-6-GHz 100-Mb/s receiver that employs a fully balanced FSK, namely, a binary frequency-domain OOK (BFOOK) modulation. Demodulation is done based on a delay-line FM demodulator and a sideband energy detection (SB-ED) circuit with reduced noise bandwidth by leveraging a fully balanced BFOOK feature. A prototype 3.5-GHz receiver based on the proposed architecture is implemented in 65-nm CMOS. The receiver performs 100-Mb/s BFOOK demodulation and consumes 24.3 mW with the sensitivity of -62 dBm, achieving high energy efficiency of 243 pJ/b.
ISSN:2573-9603
2573-9603
DOI:10.1109/LSSC.2021.3050800