Software Pipelining in a Non-Conventional Architecture to Improve Performance

Strategies to parallelize applications is one way to increase performance in computer architectures. In addition to the hardware organization, some techniques are adopted, maintaining its architecture or instruction set, in order to increase the flow of processing instructions, such as pipeline and...

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Bibliographic Details
Published inRevista IEEE América Latina Vol. 14; no. 5; pp. 2491 - 2497
Main Authors Freire Lopes Nunes, Denis, Fernandes, Silvio Roberto
Format Journal Article
LanguageEnglish
Published Los Alamitos IEEE 01.05.2016
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Architecture (computers)
Computer architecture
Computer programs
Hardware
Instruction Level Paralelism
Instruction sets
IPNoSys
Loop
Organizations
Parallel processing
Performance enhancement
Pipeline processing
Pipelining (computers)
Software
Software Pipelining
Strategy
VLIW
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Summary:Strategies to parallelize applications is one way to increase performance in computer architectures. In addition to the hardware organization, some techniques are adopted, maintaining its architecture or instruction set, in order to increase the flow of processing instructions, such as pipeline and software pipelining. This paper presents a version of the software pipelining technique in IPNoSys, an unconventional architecture, for improved performance in the execution of applications containing loops. The new version was compared with an already implemented version of the software pipelining technique to IPNoSys and was two times more efficient than the old version.
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ISSN:1548-0992
1548-0992
DOI:10.1109/TLA.2016.7530450