Integrated Output Matching Networks for Class-J/J−1 Power Amplifiers

• Published in: IEEE transactions on circuits and systems. I, Regular papers Vol. 66; no. 8; pp. 2921 - 2934
• Main Authors: Alizadeh, Amirreza, Hassanzadehyamchi, Saleh, Medi, Ali
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.08.2019; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Bandwidth; Circuit design; Class-J power amplifier; class-J−1 power amplifier; high-efficiency power amplifiers; Impedance; Inductors; Manganese; Matching; Optimized production technology; Power amplifiers; Power efficiency; standard matching networks; Topology; Transistors
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2019.2912007

In this paper, two output matching networks (OMNs) are proposed for integrated class-J and class-J −1 mode power amplifiers (PAs). The first MN provides the required load impedances of the class-J mode (i.e., <inline-formula> <tex-math notation="LaTeX">Z(f_{0})=R_{\mathrm{ opt}}+jR_{\mathrm{ opt}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">Z({2}f_{0})=-j({3}\pi /{8})R_{\mathrm{ opt}} </tex-math></inline-formula>), whereas the second MN realizes the optimal impedances of class-J −1 PAs (i.e., <inline-formula> <tex-math notation="LaTeX">Z(f_{0})=R_{\mathrm{ opt}}-jR_{\mathrm{ opt}} </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">Z({2}f_{0})=j({3}\pi /{8})R_{\mathrm{ opt}} </tex-math></inline-formula>). Detailed theoretical analyses are presented for each MN, and the values of matching components (i.e., inductors and capacitors) are obtained in terms of <inline-formula> <tex-math notation="LaTeX">R_{\mathrm{ opt}} </tex-math></inline-formula>. Analytical derivations are verified by simulation results, while bandwidth and loss performances of each MN are also characterized. Two proof-of-concept class-J and class-J −1 PAs are designed and implemented in a 0.25-<inline-formula> <tex-math notation="LaTeX">\mu \text{m} </tex-math></inline-formula> GaAs process, where the proposed OMNs are employed in the designed circuits. The manufactured PAs show ≥28 dBm output power, ≥65% drain efficiency, and ≥61% power-added efficiency at 2 GHz.