Erratum to: Ultrathin flexible InGaZnO transistor for implementing multiple functions with a very small circuit footprint
Figure 1 (d) To implement an NAND gate, the traditional design uses 3 transistors, the latest report uses 2 transistors [14], and the single transistor design uses 1 transistor.
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Published in | Nano research Vol. 14; no. 7; p. 2469 |
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Main Authors | , , , , , |
Format | Journal Article |
Language | English |
Published |
Beijing
Tsinghua University Press
01.07.2021
Springer Nature B.V |
Subjects | |
Online Access | Get full text |
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