Erratum to: Ultrathin flexible InGaZnO transistor for implementing multiple functions with a very small circuit footprint

Figure 1 (d) To implement an NAND gate, the traditional design uses 3 transistors, the latest report uses 2 transistors [14], and the single transistor design uses 1 transistor.

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Bibliographic Details
Published inNano research Vol. 14; no. 7; p. 2469
Main Authors Dai, Chaoqi, Chen, Peiqin, Qi, Shaocheng, Hu, Yongbin, Song, Zhitang, Dai, Mingzhi
Format Journal Article
LanguageEnglish
Published Beijing Tsinghua University Press 01.07.2021
Springer Nature B.V
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Summary:Figure 1 (d) To implement an NAND gate, the traditional design uses 3 transistors, the latest report uses 2 transistors [14], and the single transistor design uses 1 transistor.
Bibliography:erratum
ISSN:1998-0124
1998-0000
DOI:10.1007/s12274-021-3377-0