Improve performance of the digital sinusoidal generator in FPGA by memory usage optimization
This paper presented the improvement in the performance of the digital sinusoidal signal generator, which was implemented in FPGA, by optimizing the usage of the available memory onboard. The sine wave was generated by using a Lookup Table method, where its pre-calculated values were stored in the o...
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Published in | International journal of electrical and computer engineering (Malacca, Malacca) Vol. 9; no. 3; p. 1742 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
Yogyakarta
IAES Institute of Advanced Engineering and Science
01.06.2019
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Subjects | |
Online Access | Get full text |
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