Neural Spike Detection Circuit with Amplification Method using Input DC Level Control

A neural spike detection circuit is presented, in which all the amplifiers have an open loop architecture to reduce area and current consumption fundamentally. A new method for controlling the gain of an open loop amplifier is proposed. The gains of instrumentation amplifier (IA) and multiplier are...

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Bibliographic Details
Published inJournal of semiconductor technology and science Vol. 21; no. 3; pp. 183 - 188
Main Author Kim, Jong Pal
Format Journal Article
LanguageEnglish
Published 대한전자공학회 01.06.2021
Subjects
전기공학
implantable device
IA
Electroceuticals
instrumentation amplifier
neural spike
Online AccessGet full text
ISSN1598-1657
2233-4866
DOI10.5573/JSTS.2021.21.3.183

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Summary:A neural spike detection circuit is presented, in which all the amplifiers have an open loop architecture to reduce area and current consumption fundamentally. A new method for controlling the gain of an open loop amplifier is proposed. The gains of instrumentation amplifier (IA) and multiplier are controlled by a DC level of the input. In addition, an instrumentation amplifier (IA) includes a compensation circuit against the fabrication process corners to prevent amplification failure. The compensation circuit detects and adds threshold voltage variations in the compensation feedback loop. The circuit is fabricated using the standard 0.18 μm CMOS process. Changing the DC level at the IA input results in the amplification gain increase up to 650 V/V. The nonlinear amplification control capability of the multiplier is verified as the DC input level changes. The minimum detectable amplitude of neural spike is 100 µVpk. The overall power consumption is 1.4 µW. Integrated input-referred noise is measured to be 7.1 μVrms in a frequency range of 100 Hz to 10 kHz. KCI Citation Count: 0
ISSN:1598-1657
2233-4866
DOI:10.5573/JSTS.2021.21.3.183