Study of the effect of switching speed of the a-SiC/c-Si(p)-based, thyristor-like, ultra-high-speed switches, using two-dimensional simulation techniques

• Published in: Journal of semiconductors Vol. 38; no. 5; pp. 54001 - 54007
• Main Authors: Dimitriadis, Evangelos I., Georgoulas, Nikolaos
• Format: Journal Article
• Language: English
• Published: Chinese Institute of Electronics 01.06.2017
• Subjects: amorphous SiC; ESD protection; rise time; simulation; switches
• ISSN: 1674-4926
• DOI: 10.1088/1674-4926/38/5/054001

A parametric study for a series of technological and geometrical parameters affecting rise time of Al/a-SiC/c-Si(p)/c-Si(n+)/Al thyristor-like switches, is presented here for the first time, using two-dimensional simulation techniques. By varying anode current values in simulation procedure we achieved very good agreement between simulation and experimental results for the rising time characteristics of the switch. A series of factors affecting the rising time of the switches are studied here. Two factors among all others studied here, exerting most significant influence, of more than one order of magnitude on the rising time, are a-SiC and c-Si(p) region widths, validating our earlier presented model for device operation. The above widths can be easily varied on device manufacture procedure. We also successfully simulated the rising time characteristics of our earlier presented simulated improved switch, with forward breakover voltage V BF = 11 V and forward voltage drop V F = 9.5 V at the ON state, exhibiting an ultra low rise time value of less than 10 ps, which in conjunction with its high anode current density values of 12 A/mm2 and also cheap and easy fabrication techniques, makes this switch appropriate for ESD protection as well as RF MEMS and NEMS applications.