Interconnect Technologies and Advanced Packaging for High Performance Computing

The quest for high speed data processing continues to drive the industry to increase L1 and L2 on -chip caches and near-processor memories in large-scale computer systems. However, the increased latency and process yields limit chip area for L1 and L2 caches. Therefore alternative solutions beyond o...

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Bibliographic Details
Published inECS transactions Vol. 27; no. 1; pp. 819 - 824
Main Authors Shi, Jing, Sze, Theresa, Song, Deqiang, Huang, Dawei, Cunningham, John E.
Format Journal Article
LanguageEnglish
Published 01.01.2010
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Summary:The quest for high speed data processing continues to drive the industry to increase L1 and L2 on -chip caches and near-processor memories in large-scale computer systems. However, the increased latency and process yields limit chip area for L1 and L2 caches. Therefore alternative solutions beyond on-chip memory are being aggressively pursued. In this paper a high-level computer memory hierarchy and the corresponding interconnect technologies on each level of memory structures are summarized. We introduce a new MCM package technology based on proximity communication (PxC-MCM package) and discuss its merits compared to conventional MCM. Challenges and recent research results on PxC-MCM solution are presented as well.
ISSN:1938-5862
1938-6737
DOI:10.1149/1.3360716