Octa multibit upset correction in SRAM memories using interleaved MPC code
In space applications, cosmic radiation-induced multiple cells upset (MCU) poses a major stability issue for static random-access memory (SRAM). During the past decade, radiation-induced MCUs have been responsible for a significant increase in the proportion of mistakes affecting multiple memory cel...
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Published in | International journal of information technology (Singapore. Online) Vol. 17; no. 6; pp. 3519 - 3525 |
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Main Authors | , |
Format | Journal Article |
Language | English |
Published |
Singapore
Springer Nature Singapore
01.07.2025
Springer Nature B.V |
Subjects | |
Online Access | Get full text |
ISSN | 2511-2104 2511-2112 |
DOI | 10.1007/s41870-025-02468-2 |
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Summary: | In space applications, cosmic radiation-induced multiple cells upset (MCU) poses a major stability issue for static random-access memory (SRAM). During the past decade, radiation-induced MCUs have been responsible for a significant increase in the proportion of mistakes affecting multiple memory cells. This research proposes an Interleave Multibit Parity Code (IMPC) for Octa multibit upset correction in SRAM, achieving low latency and error rates. The IMPC technique predicts MCUs before decoding and corrects adjacent 8-bit errors effectively, utilizing a parity-check matrix with minimal redundancy. Additionally, the encoder is reused to reduce overhead without interfering with the encoding and decoding process by reducing the area overhead of additional circuits. With the 45-nm library, encoders and decoders can be constructed with a minimal amount of area and delay overhead. Experimental results shows that the proposed code is more area-efficient, faster, and more power-efficient than current ECC codes. |
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Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
ISSN: | 2511-2104 2511-2112 |
DOI: | 10.1007/s41870-025-02468-2 |