Extreme scaling with ultra-thin Si channel MOSFETs

We examine the scaling limits for planar single gate technology using the ultra-thin Si channel MOSFET. Characteristics for extreme scaled devices with physical gate lengths down to 6 nm and SOI channels as thin as 4 nm are presented. For the first time, we report ring oscillators with 26 nm gate le...

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Bibliographic Details
Published inDigest. International Electron Devices Meeting pp. 267 - 270
Main Authors Doris, B., Meikei Ieong, Kanarsky, T., Ying Zhang, Roy, R.A., Dokumaci, O., Zhibin Ren, Fen-Fen Jamin, Leathen Shi, Natzle, W., Hsiang-Jen Huang, Mezzapelle, J., Mocuta, A., Womack, S., Gribelyuk, M., Jones, E.C., Miller, R.J., Wong, H.-S.P., Haensch, W.
Format Conference Proceeding
LanguageEnglish
Published Piscataway NJ IEEE 2002
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Summary:We examine the scaling limits for planar single gate technology using the ultra-thin Si channel MOSFET. Characteristics for extreme scaled devices with physical gate lengths down to 6 nm and SOI channels as thin as 4 nm are presented. For the first time, we report ring oscillators with 26 nm gate lengths and ultra-thin Si channels.
ISBN:9780780374621
0780374622
DOI:10.1109/IEDM.2002.1175829