A passive UHF RFID tag with a dynamic-Vth-cancellation rectifier

This paper presents a passive UHF RFID tag with a dynamicVthcancellation （DVC） rectifier. In the rectifier, the threshold voltages of MOSFETs are cancelled by applying gate bias voltages, which are dynamically changed according to the states of the MOSFETs. The DVC rectifier enables both low ONresis...

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Bibliographic Details
Published in半导体学报：英文版 no. 9; pp. 117 - 121
Main Author 沈劲鹏 汪波 刘珊 王新安 阮正坤 李守成
Format Journal Article
LanguageEnglish
Published 01.09.2013
Subjects
CMOS工艺
MOSFET
RFID标签
UHF
功率转换效率
整流器
无源
芯片尺寸
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Summary:This paper presents a passive UHF RFID tag with a dynamicVthcancellation （DVC） rectifier. In the rectifier, the threshold voltages of MOSFETs are cancelled by applying gate bias voltages, which are dynamically changed according to the states of the MOSFETs. The DVC rectifier enables both low ONresistance and small re verse leakage of the MOSFETs, resulting in high power conversion efficiency （PCE）. An areaefficient demodulator with a novel average detector is also designed, which takes advantage of the rectifier＇s first stage as the envelope detector. The whole tag chip is implemented in a 0.18 μm CMOS process with a die size of 880 x 950μm2. Measurement results show that the rectifier achieves a maximum PCE of 53.7% with 80 kΩ resistor load.
Bibliography:11-5781/TN
UHF RFID tag; rectifier; demodulator; PCE
Shen Jinpeng, Wang Bo, Liu Shan, Wang Xin＇an, Ruan Zhengkun, and Li ShouchengThe Key Laboratory of Integrated Microsystems, Peking University Shenzhen Graduate School, Shenzhen 518055, China
This paper presents a passive UHF RFID tag with a dynamicVthcancellation （DVC） rectifier. In the rectifier, the threshold voltages of MOSFETs are cancelled by applying gate bias voltages, which are dynamically changed according to the states of the MOSFETs. The DVC rectifier enables both low ONresistance and small re verse leakage of the MOSFETs, resulting in high power conversion efficiency （PCE）. An areaefficient demodulator with a novel average detector is also designed, which takes advantage of the rectifier＇s first stage as the envelope detector. The whole tag chip is implemented in a 0.18 μm CMOS process with a die size of 880 x 950μm2. Measurement results show that the rectifier achieves a maximum PCE of 53.7% with 80 kΩ resistor load.
ISSN:1674-4926
DOI:10.1088/1674-4926/34/9/095005