A 2-GHz Two-Tone Direct Digital Frequency Synthesizer

• Published in: IEEE transactions on circuits and systems. II, Express briefs Vol. 69; no. 12; pp. 5109 - 5113
• Main Authors: Narayan Sinha, Shibendra, Chatterjee, Shouri, Palani, Rakesh Kumar
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.12.2022; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: direct digital synthesis; Field programmable gate array; Field programmable gate arrays; frequency; Frequency division multiplexing; Frequency synthesizers; lookup table; Multicore processing; Pipeline processing; Synthesis; Table lookup; Time-frequency analysis; Truncation errors

We present a 2-GHz 16-bit direct digital synthesizer (DDS) implemented and verified on a Xilinx Artix-7 FPGA, Nexys-4 DDR development board. The lookup-table based DDS is implemented with the help of multiplexers in a tree structure. The proposed technique can operate at a high clock frequency of 25...