Comprehensive survey of tunnel FETs based on structure for low power consumptions

• Published in: Micro and nanostructures (2022) Vol. 207; p. 208305
• Main Authors: Ram, Vijay Kumar, chaudhary, Tarun
• Format: Journal Article
• Language: English
• Published: Elsevier Ltd 01.11.2025
• Subjects: DG-TFET; NW-TFET; SOI TFET; TFET; Vertical TFET; NW-TFET; DG-TFET; Vertical TFET; SOI TFET; TFET
• ISSN: 2773-0123; 2773-0123
• DOI: 10.1016/j.micrna.2025.208305

The manuscript highlights the effect of the tunnel field effect transistors (TFETs). TFETs have special features like quick switching, compatibility with different materials, an uneven shape, low energy use before they turn on, the ability to be made smaller, and low power needs, which make them perfect for building tiny devices. The TFET is a low-power, high-sensitivity semiconductor device that could be utilized in ultra-low-power IoT devices, energy-efficient mobile processors, and AI accelerators. The review work in this manuscript analyzed how leakage current is decreased by the TFET's strong inverse subthreshold slope (SS). This paper compares various TFET structures and discusses recent advancements in the TFET technique, its purpose, and properties. Among the subjects discussed in this study are GAA, junctionless, heterojunction, charge plasma, dopingless, and multigate work functions. •TFET Device Architectures: Thorough review of various TFET (Tunneling Field-Effect Transistor) architectures.•Ferroelectric SiO₂ transistors: Opportunities and challenges in boosting ON current with ferroelectric materials.•Improved Subthreshold Swing (SS): Exploring device designs, processes, and parameters to minimize SS.•Negative Capacitance Devices: Promising potential for the semiconductor industry over nanoscale energy technologies.•Ultra-Low Power Applications: The discussed device concepts suggest a promising future for ultra-low power applications.