Design of Fused Add-Multiply Operator using Modified Booth Recoder for Fast Arithmetic Circuits

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Bibliographic Details
Published inIndian journal of science and technology Vol. 8; no. 19
Main Authors Raghavendra, Jonnalagadda, Vigneswaran, T.
Format Journal Article
LanguageEnglish
Published 14.08.2015
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ISSN0974-6846
0974-5645
DOI10.17485/ijst/2015/v8i19/77052

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ISSN:0974-6846
0974-5645
DOI:10.17485/ijst/2015/v8i19/77052