A Single-Ended SAR ADC With Fully Differential DAC Switching Scheme for IoT Applications

This brief introduces a single-ended SAR ADC with a novel fully differential DAC switching scheme. This scheme achieves fully differential switching by smartly sampling the single-ended input and pre-switching before the conversion phase, maintaining a constant DAC output common-mode voltage during...

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Bibliographic Details
Published inIEEE transactions on circuits and systems. II, Express briefs Vol. 71; no. 11; pp. 4713 - 4717
Main Authors Du, Kaixuan, Liu, Maoqiang, Wang, Zhixuan, Li, Heyi, Bao, Yuanxin, Shen, Linxiao, Ye, Le
Format Journal Article
LanguageEnglish
Published New York IEEE 01.11.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Analog-to-digital converter (ADC)
Capacitors
common-mode voltage
Complexity theory
Digital to analog converters
Electric potential
Figure of merit
Power demand
Sampling
single-ended
successive approximation register (SAR)
Switches
Switching circuits
switching scheme
Timing
Voltage
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Summary:This brief introduces a single-ended SAR ADC with a novel fully differential DAC switching scheme. This scheme achieves fully differential switching by smartly sampling the single-ended input and pre-switching before the conversion phase, maintaining a constant DAC output common-mode voltage during conversion. As a result, it eliminates the impact of comparator dynamic offset voltage on SAR ADC precision. Additionally, this switching scheme does not require additional reference voltages like Vcm, which reduces system complexity and peripheral circuit power consumption. The prototype is fabricated using a 110 nm CMOS process and tested with a 1 V supply voltage and 200 kHz sampling rate. The measured ENOB is 10.1 bits with a near Nyquist input frequency, resulting in a Walden figure-of-merit (FoM) of 31 fJ/conversion step.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2023.3342829