A 4×2 switch matrix in QFN24 package for 0.5–3 GHz application
This paper presents a 4×2 switching matrix implemented in the Win 0.5 μm Ga As pseudomorphic high electron mobility transistor process, it covers the 0.5–3 GHz frequency range. The switch matrix is composed of 4 SPDT switch whose two output ports can simultaneously select the input port and a 4 to 8...
Saved in:
Published in | Journal of semiconductors Vol. 35; no. 12; pp. 128 - 132 |
---|---|
Main Author | |
Format | Journal Article |
Language | English |
Published |
01.12.2014
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | This paper presents a 4×2 switching matrix implemented in the Win 0.5 μm Ga As pseudomorphic high electron mobility transistor process, it covers the 0.5–3 GHz frequency range. The switch matrix is composed of 4 SPDT switch whose two output ports can simultaneously select the input port and a 4 to 8 bit digital decoder,both the radio frequency(RF) part and the digital part are integrated into one single chip. The chip is packaged in a low cost QFN24 plastic package. On chip shunt, capacitors at the input ports are taken to compensate for the bonding wire inductance effect. The designed switch matrix shows a good measured performance: the insertion loss is less than 5.5 dB, the isolation is no worse than 30 dB, the return loss of input ports and output ports is better than –10 dB, the input 1 dB compression point is better than 25.6 dBm, and the OIP3 is better than 37 dBm. The chip size of the switch matrix is only 1.45×1.45 mm^2. |
---|---|
Bibliography: | Liu Yuzhe,Mu Pengfei,Gong Renjie,Wan Jing,Zhang Yulin,Yan Yuepeng(Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China) 11-5781/TN This paper presents a 4×2 switching matrix implemented in the Win 0.5 μm Ga As pseudomorphic high electron mobility transistor process, it covers the 0.5–3 GHz frequency range. The switch matrix is composed of 4 SPDT switch whose two output ports can simultaneously select the input port and a 4 to 8 bit digital decoder,both the radio frequency(RF) part and the digital part are integrated into one single chip. The chip is packaged in a low cost QFN24 plastic package. On chip shunt, capacitors at the input ports are taken to compensate for the bonding wire inductance effect. The designed switch matrix shows a good measured performance: the insertion loss is less than 5.5 dB, the isolation is no worse than 30 dB, the return loss of input ports and output ports is better than –10 dB, the input 1 dB compression point is better than 25.6 dBm, and the OIP3 is better than 37 dBm. The chip size of the switch matrix is only 1.45×1.45 mm^2. switch matrix; PHEMT; single pole double throw(SPDT); decoder; QFN24 |
ISSN: | 1674-4926 |
DOI: | 10.1088/1674-4926/35/12/125012 |