Editorial Rolling Out the IEEE TVLSI EDICS

• Published in: IEEE transactions on very large scale integration (VLSI) systems Vol. 31; no. 12; pp. 1879 - 1881
• Main Author: Stan, Mircea R.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.12.2023; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Circuits; Large scale integration; Performance evaluation; Very large scale integration
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2023.3324533

VLSI Systems research represents a dynamic and expansive domain. Over the years, it has evolved into a creative fusion of theoretical exploration, integrated chip design, performance evaluation, and practical applications related to the wide areas of circuits and systems, computer hardware and solid-state circuits. In acknowledgment of the extensive influence of very large-scale integration (VLSI) systems and the diverse research trends within this field, we have embarked on an Editor's Information Classification Scheme (EDICS) for IEEE Transactions on Very Large Scale Integration (VLSI) Systems. The primary purpose of these EDICS is to provide a comprehensive description of the focal points within TVLSI. Furthermore, they aid in the judicious allocation of papers to associate editors and reviewers who possess expertise in the specific subject matter of each submission.