Improved power semiconductor dynamic testing circuit to suppress leakage current

Double pulse testing (DPT) is widely used for dynamic performance testing of power semiconductors, as it can quickly obtain dynamic characterization parameters. In recent research, chips are often explored as they approach the limit temperature. However, during conventional DPT, leakage currents inc...

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Bibliographic Details
Published inIEEE journal of emerging and selected topics in power electronics p. 1
Main Authors Hui, Xiaoshuang, Ning, Puqi, Zheng, Dan, Fan, Tao, Wang, Kai, Mei, Yunhui
Format Journal Article
LanguageEnglish
Published IEEE 2024
Subjects
Double pulse test
Insulated gate bipolar transistors
Integrated circuit modeling
junction temperature
Junctions
Leakage currents
Multichip modules
power module
Switches
Temperature measurement
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Summary:Double pulse testing (DPT) is widely used for dynamic performance testing of power semiconductors, as it can quickly obtain dynamic characterization parameters. In recent research, chips are often explored as they approach the limit temperature. However, during conventional DPT, leakage currents increase steadily at high temperatures and high voltage circumstances. The self-heating effect of leakage current makes it impossible to maintain the desired junction temperature, which causes thermal runaway. By building a thermal impedance model, this paper analyzed the thermal failure mechanism caused by leakage current, and proposed an improved circuit. Experimental results showed that the circuit could successfully suppress leakage current from over 100 mA to less than 10 mA.
ISSN:2168-6777
2168-6785
DOI:10.1109/JESTPE.2024.3403105